arrow_back
CMOS & ASIC Design
Lecture Videos
Introduction to MOS​
Technology Nodes & Trends
ASIC Design : Ecosystem
Design Specification
Synthesis
Physical Design Flow
Post GDS
Assignment
Quiz
Synthesis
Lecture Videos
Introduction to Synthesis
High Level Design Flow
Synthesis Flow
Timing Constraints
QoR Report
Functional Equivalence
Assignment
Quiz
Lab Videos
Lab Manual Synthesis Logical
Synthesis Logical
Lab Manual Synthesis Physical
Synthesis Physical
Data Preparation
Lecture Videos
Inputs To Block PD Implementation
Files Required for PD Implementation
Additional Information
Assignment
Quiz
Lab Videos
Lab Manual Data Preparation
Data Preparation
Sanity Checks
Lecture Videos
Introduction to Sanity Checks
Netlist Check
SDC Checks
Library Checks
Assignment
Quiz
PD Flow and terminology
Lecture Videos
Full Chip Partitioning
Powerplan
Placement & Optimization
CTS & Optimization
Routing & Optimization
Signoff
Floorplanning
Lecture Videos
Introduction to Floor Planning
Deciding the Size of the Block
Deciding the Shape of the Block
I/O Port Placement
Macro Placement
Physical only Cells
Floorplan Checklist
Types of SoC Floorplan
Flat and Hierarchical Floorplanning
Additional Information
Assignment
Quiz
Lab Videos
Lab Manual Floorplan
Floorplan
Powerplanning
Lecture Videos
Power Plan Objectives
Power Consumption in IC
Power Planning
Low Power Techniques
Assignment
Quiz
Lab Videos
Lab Manual Powerplan
Powerplan
STA-1
Lecture Videos
Introduction to STA-1
Setup
Hold
Timing Reports
Timing Checks-Setup & Hold
Clock Skew
Additional Information
Assignment
Quiz
Placements
Lecture Videos
Introduction To Placement
Physical Cells
Placement Methodologies
Steps During Placement
Post Placement
Scan Chain
QoR Analysis
Congestion Analysis
Timing Analysis
Placement Checks
Assignment
Quiz
Lab Videos
Lab Manual Placement
Placement
Clock Tree Synthesis CTS
Lecture Videos
Introduction To CTS
CTS Specifications
CTS QoR
Clock Uncertainty
CTS & Opt-Quality Checks
Additional Topics
Assignment
Quiz
Lab Videos
Lab Manual CTS
CTS
Routing
Lecture Videos
Introduction To Routing
Routing Flow
Post Route Optimization
Cross Talk
Antenna Violation
Routing Quality Summary
Assignment
Quiz
Lab Videos
Lab Manual Routing
Routing
Optimization Techniques
Lecture Videos
Introduction to Optimization​
Timing Optimization
Power Optimization
Area Optimization
Assignment
Quiz
Lab Videos
Optimization and DTMF Project 1
Optimization and DTMF Project 2
Process Variation
Lecture Videos
Introduction to Process Variation
Global Variation
Local Variation
Assignment
Quiz
Signoff-I
Lecture Videos
Introduction To Signoff
Extraction
Timing Analysis
Timing Violation & Fixes
PrimeTime Commands
ECO
LEC
Assignment
Quiz
Lab Videos
Lab Manual Parasitic Extraction
Parasitic Extraction
Lab Manual Signoff STA
Signoff-STA
Lab Manual ECO Flow
ECO Flow
Signoff-II
Lecture Videos
Introduction to Signoff
Filler Cells
Decap Cells
Dummy Fill
PV Checks
IR Drop / EM
ESD
Assignment
Quiz
Sign Off Checks PV DTMF Project Lab (Part 1)
Sign Off Checks PV DTMF Project Lab (Part 2)
Advance Timing Concepts
Cross Talk Effect on Timing
OCV Effect On Timing
CRPR
Timing Exceptions
GBA vs PBA
Asynchronous Path
Lock Up Latch
Delay Models
Introduction to Low Power Design
Overview
Power Component
Low Power Methods
Low Power cells
UPF
Project Documentation
JBI Architecture Specifications
JBI Project Details
Falcon Project Details
Final Assessment
Assessment
Preview - Physical Design with Lab (Synopsys Tools ICC2)
Discuss (
0
)
navigate_before
Previous
Next
navigate_next