Introduction to DFT:

This Course will enlighten the learners about scan design for testing or Design for Testability. The learners will get an idea about the role of DFT Engineers in each stage of chip life cycle. Also gives an introduction to what DFT is, and why it is needed.

Scan Insertion without Compression:

This Course will enlighten the learners about scan design for testing or Design for Testability. The learners will get an idea about the role of DFT Engineers in each stage of chip life cycle. Also gives an introduction to what DFT is, and why it is needed.

 This course talks about detailed concepts on Scan Insertion, and Scan Design Rules with suitable examples. This course will give in-depth details on Lockup Latches.

Scan Insertion and Scan Compression with OCC:

This Course will enlighten the learners about scan design for testing or Design for Testability. The learners will get an idea about the role of DFT Engineers in each stage of chip life cycle. Also gives an introduction to what DFT is, and why it is needed.

 This course talks about detailed concepts on Scan Insertion, and Scan Design Rules with suitable examples. This course will give in-depth details on Lockup Latches.

You will also learn how to reduce the test application time, test data volume, and thereby test cost of an IC due to the increase in size and complexity with the concept of scan compression. The concepts of OCC is also discussed in this course.